Imp Questions in VLSI

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  1.(a)Explain the processing steps in fabrication of PMOS technology with neatsketches.(b) Explain about stick diagram with colour coding and monochrome encoding.(a) Explain in detail the p-well process for CMOS fabrication indicating the masksused.(b) Draw a neat sketch of CMOS inverter fabricated using n-well process.2.a) Explain about scaling.b)What are the additional two layers in BICMOS technology compared to other.3.a) Draw the circuit of CMOS Inverter and explain its operation.b) What are the various pull up transistors used for inverters?4. (a)Draw the circuits for n-MOS, p-MOS and C-MOS Inverter and explain about theiroperation and compare them.5.(a) What are the different types of oxidation processes? Explain.(b) With the help of neat sketches, explain the steps involved in photolithographyand pattern transfer?6.(a) Why scaling is required?(b) How does Depletion Regions around Source and Drain are affected due toscaling down of device dimensions? Explain.7. Draw cmos circuit diagrams and stickdiagrams for two input(i) NOR gate (ii)Nand gate (iii) Exor gate8. Draw the circuit for nMOS Inverter and explain its operation and characteristics.9(a) What is a tub tie? Explain this with an example.(b) Draw Stick diagram for CMOS Inverter, giving explanation.8.(a) With the help of sketches explain the principles of different types of diffusion'Processes.(b) Explain about Fick's laws of diffusion.10.(a) Explain about Design Rule Check. Why is it employed?(b) For various processes in MOS IC fabrication, explain about Design Rules11.(a) Derive the expression for Ids vs vds?(b) Explain about Body effect parameter channel length modulation of MOSFETs.12.(a) Explain about leakage current problems in MOSFETs.(b) Explain the terms Figure of Merit of MOSFET and output conductance, usingnecessary equations.  13(a) Explain about the effect of scaling on MOSFET parametersi. Channel Resistance.ii. Transistor Delayiii. Switching Energyiv. Power Dissipation(b) Explain about the difficulties arising due to scaling14.(a) Explain about rules for drawing Stick's Diagram.(b) Draw the circuit for 2-input NAND gate and draw the layout diagram for thesame, giving explanation.15. Draw the circuit for 2-input NOR gate and its layout diagram giving expla-nations.16.(a) Draw the stick diagram and layout for the following function f = A΄ B + AC΄ + B ΄C   (b) What is the difference between 'α' and 'β' scaling factors? Give some exam -ples.17.(a) What is the purpose of metallisation in I.C. manfacturing? Explain the methodsemployed for metallisation.(b) What is probe testing? Why it is used?18. calculate ID and VDs for the NMOSFET if Kn = 120µA/V, Vtn = 0:6v&w/l=4:1,Vdd=5v,Vgs=1.2v,loa resistor =119. Explain about the process steps(a) Crystal Growth(b) Oxidation(c) Diffusion(d) Lithography(e) Matallisationinvolved in the fabrication of ICs.20.Draw the CMOS circuit to realize the Boolean expression y=A-B, and explainthe same.21.For nMOS Inverter driven by another nMOS Inverter, derive the expression for Zpu/Zpd ratio. And also For nMOS Inverter driven by another nMOS Inverter throughOne or more pass transistors?  22. Due to scaling and smaller dimensions of MOSFETs, explain the effect on(a) Drain Induced Barrier lowering(b) Lower Transconductance(c) Inter - connect capacitance.23.Explain pass transistor logic,integratred resistors and capacitors,cmos nanotechnology.24.Write down the difference between cmos and bicmos technology?25.What is latchup problem?explain bicmos inverter circuit? How latch up problem is solved in Pwell,nwell cmos process?
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